Note concerning that Figure 3 is the result of one typical simulation, and Figure 4 is the statistical result of many simulations.Figure 3Prediction of phase noise in a typical 10MHz crystal oscillator.Figure 4Prediction of frequency instability, ADEV: overlapping Allan standard deviations, TDEV: Allan time standard deviations.Table 1Phase noise parameters of one typical crystal oscillator.From the models of phase noise described in the previous sections, we get the comparative results of the output phase noise between the radar channel and synchronization channel, shown in Figure 5. The observation could be made that, within the loop bandwidth, the PLL phase detector is typically the dominant noise source, and outside the loop bandwidth, the VCO noise is often the dominant noise source.

Hence, the performance of the synchronization link will be impacted by the common misconception that the phase noise will vary with 20log (f0/fosc) with fosc being the oscillator frequency.Figure 5Comparative results of output phase noise between synchronization channel and radar channel.Additionally, the phase of the synchronization link may be influenced by receiver noise, analog-to-digital convertor (ADC), and data interpolation. As we have mentioned previously, the receiver noise determined by SNR is of special interest. Furthermore, the synchronization phase is sampled, which requires a later interpolation of the compensation phase. We may choose to filter the compensation phase with an arbitrary transfer function Hsyn(f) like [26].

Note that, if distributed SAR imaging is considered, the compensated SAR phase (SAR phase after subtracting the compensation phase) is filtered through azimuth compression. This filter is described by the transfer function Haz(f) and is dependent on the azimuth processing. The impact of receiver noise on synchronization phase is [26]��SNR2=12fsyn?SNR����?fsyn/2fsyn/2S��,SNR(f)|Hsyn(f)Haz(f)|2df,(28)wherefsynrepresents the synchronization repeatedly frequency rate.In the case of digital-to-analog convertor (DAC), the quantization errors result in what appears to be a white noise floor but is actually a ��sea�� of very finely spaced discrete spurs. For a N-bit DAC, the phase errors due to quantization errors are determined by [39]��max?��arctan(12N?1).(29)Note that N = 12 is assumed Entinostat in the following simulation.The interpolation error is because frequency components outside the range ?fsyn/2 < f < fsyn/2 are lost due to the sampling and hence cannot be reconstructed. The interpolation variance is [21]��int?2=2(f0fosc)2��fsyn/2��|Haz(f)|2df.